The invention relates generally to the field of electrical component testing and, more particularly, to continuity and integrity testing of signals through an electrical connector.
Many current computer systems use a system circuit board (a motherboard) to host the system""s central processing unit, bus bridge circuitry, and other system critical circuitry. Motherboards also typically include a number of sockets (e.g., card edge connectors) through which additional components such as random access memory (RAM), universal serial bus (USB) devices, audio and video devices, network control circuitry, and modems may be coupled. A failure on any pin in any connector may affect the entire computer system.
With today""s high speed signals, even a small amount of corrosion or other defect in a socket may cause a component or system failure. Current techniques to locate mechanical failures include probing individual pins within a socket""s connector with an oscilloscope or digital logic analyzer. These techniques are both time consuming and may not test the system under operational conditions. Thus, it would be beneficial to provide a mechanism for testing socket connectors by performing signal continuity and integrity testing in an operational setting.
In one embodiment the invention provides a test device including a connector configured to mate with a memory module socket (the connector having pins to receive signals from the socket), a signal detection circuit to detect a power characteristic of a first signal (for example, voltage or current level), and an edge detection circuit to detect a transition of a second signal (for example, a high-to-low state or a low-to-high state transition). The embodiment may also include an indication circuit to indicate the operation of the detection circuit and the edge detection circuit.
In another embodiment, the invention provides a test device including a connector configured to mate with a memory module socket (the connector having pins to receive signals from the socket), a signal capture circuit to detect and digitally sample a signal on at least one of the pins, and a memory to store a value representative of the sampled signal. This embodiment may also include a routine stored in the memory to direct the signal capture circuit to perform signal integrity analysis on the sampled signal, and/or an indicator circuit to indicate operation of the signal capture circuit, and/or an output circuit to communicate the representation of the sampled signal to a display unit. The integrity analysis may include, for example, signal voltage levels and/or signal transition time analysis.